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Bug #145 » inno_for_sb35_rity-kirkstone-v23.0-v002.patch

Lion Wang, 04/30/2024 01:25 PM

View differences:

src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0001-Set-bootdelay-to-0-to-save-3secs-of-booting-time.patch → src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0001-Set-bootdelay-to-0-to-save-2secs-of-booting-time.patch
1 1 
From 6061bcfb8f1dfc47714beae179be4bc4e4223062 Mon Sep 17 00:00:00 2001
2 2 
From: Rockefeller Lin <rockefeller.lin@innocomm.com>
3 3 
Date: Fri, 7 Apr 2023 03:29:44 +0000
4 
Subject: [PATCH] Set bootdelay to 0 to save ~3secs of booting time
4 
Subject: [PATCH] Set bootdelay to 0 to save ~2secs of booting time
5 5 

  		




  6
  
  
    
Set bootdelay to 0 to save ~3secs of booting time

  		




  
  6
  
    
Set bootdelay to 0 to save ~2secs of booting time

  		




  7
  7
  
    
---

  		




  8
  8
  
    
 configs/mt8365_sb35_defconfig        | 1 +

  		




  9
  9
  
    
 1 files changed, 1 insertions(+)

  		












  

    
      src/meta-mediatek-bsp/recipes-bsp/u-boot/u-boot_git.bb
    
  





  6
  6
  
    
	file://fw_env.config \

  		




  7
  7
  
    
	file://0001-Add-dedicated-sb35-defconfig-and-dts-files.patch \

  		




  8
  8
  
    
	file://0002-Remove-DPI-and-it66121-from-sb35-dts.patch \

  		




  9
  
  
    
	file://0001-Set-bootdelay-to-0-to-save-3secs-of-booting-time.patch \

  		




  
  9
  
    
	file://0001-Set-bootdelay-to-0-to-save-2secs-of-booting-time.patch \

  		




  10
  10
  
    
"

  		












  

    
      src/meta-mediatek-bsp/recipes-kernel/linux/linux-mtk/0001-lt9611-porting.patch
    
  





  1
  
  
    
From 94daedcf534be4762f11c8ab921263540884c5f2 Mon Sep 17 00:00:00 2001

  		




  
  1
  
    
From 2bbf0418c583d931056a70d05658e7140cf78f32 Mon Sep 17 00:00:00 2001

  		




  2
  2
  
    
From: Rockefeller Lin <rockefeller.lin@innocomm.com>

  		




  3
  3
  
    
Date: Wed, 17 May 2023 11:35:51 +0800

  		




  4
  
  
    
Subject: [PATCH 1/1] lt9611 porting

  		




  
  4
  
    
Subject: [PATCH] lt9611 porting

  		




  5
  5
  
    

  		




  6
  6
  
    
---

  		




  7
  
  
    
 arch/arm64/boot/dts/mediatek/mt8365-sb35.dts | 28 +++++++++++++++++++-

  		




  8
  
  
    
 drivers/gpu/drm/bridge/lontium-lt9611.c      | 19 +++++++++++++

  		




  9
  
  
    
 2 files changed, 46 insertions(+), 1 deletion(-)

  		




  
  7
  
    
 arch/arm64/boot/dts/mediatek/mt8365-sb35.dts | 36 ++++++++++++++++++--

  		




  
  8
  
    
 1 file changed, 34 insertions(+), 2 deletions(-)

  		




  10
  9
  
    

  		




  11
  10
  
    
diff --git a/arch/arm64/boot/dts/mediatek/mt8365-sb35.dts b/arch/arm64/boot/dts/mediatek/mt8365-sb35.dts

  		




  12
  
  
    
index f226ec49bc2f..e8260faaab55 100644

  		




  
  11
  
    
index f226ec49bc2f..4ba2e16e18f6 100644

  		




  13
  12
  
    
--- a/arch/arm64/boot/dts/mediatek/mt8365-sb35.dts

  		




  14
  13
  
    
+++ b/arch/arm64/boot/dts/mediatek/mt8365-sb35.dts

  		




  15
  
  
    
@@ -321,7 +321,7 @@ hdmi-bridge@3b {

  		




  
  14
  
    
@@ -171,6 +171,9 @@ hdmi-out {

  		




  
  15
  
    
 		compatible = "hdmi-connector";

  		




  
  16
  
    
 		type = "a";

  		




  
  17
  
    
 		ddc-i2c-bus = <&i2c2>;

  		




  
  18
  
    
+		pinctrl-0 = <&hdmi_ddc_pins>;

  		




  
  19
  
    
+		pinctrl-names = "default";

  		




  
  20
  
    
+		ddc-en-gpios = <&pio 4 GPIO_ACTIVE_HIGH>;

  		




  
  21
  
    
 

  		




  
  22
  
    
 		port {

  		




  
  23
  
    
 			hdmi_con: endpoint {

  		




  
  24
  
    
@@ -321,7 +324,7 @@ hdmi-bridge@3b {

  		




  16
  25
  
    
 		compatible = "lontium,lt9611";

  		




  17
  26
  
    
 		reg = <0x3b>;

  		




  18
  27
  
    
 		pinctrl-0 = <&hdmi_pins>;

  		




  ......




  21
  30
  
    
 

  		




  22
  31
  
    
 		reset-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;

  		




  23
  32
  
    
 		interrupts-extended = <&pio 125 IRQ_TYPE_EDGE_FALLING>;

  		




  24
  
  
    
@@ -657,6 +657,32 @@ pin_pwr_en {

  		




  
  33
  
    
@@ -652,13 +655,42 @@ pin_ethernet_reset {

  		




  
  34
  
    
 		};

  		




  
  35
  
    
 	};

  		




  
  36
  
    
 

  		




  
  37
  
    
-	hdmi_pins: hdmi-pins {

  		




  
  38
  
    
+	hdmi_ddc_pins: hdmi-ddc-pins {

  		




  
  39
  
    
 		pin_pwr_en {

  		




  25
  40
  
    
 			pinmux = <MT8365_PIN_4_GPIO4__FUNC_GPIO4>;

  		




  26
  41
  
    
 			output-high;

  		




  27
  42
  
    
 		};

  		




  
  43
  
    
 	};

  		




  
  44
  
    
 

  		




  28
  45
  
    
+

  		




  
  46
  
    
+	hdmi_pins: hdmi-pins {

  		




  29
  47
  
    
+		pin_lt9611_1v8_en {

  		




  30
  48
  
    
+			pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_GPIO19>;

  		




  31
  49
  
    
+			output-low;

  		




  ......




  51
  69
  
    
+			pinmux = <MT8365_PIN_2_GPIO2__FUNC_GPIO2>;

  		




  52
  70
  
    
+			output-low;

  		




  53
  71
  
    
+		};

  		




  54
  
  
    
 	};

  		




  55
  
  
    
 

  		




  56
  
  
    
 	keypad_pins: keypad-pins {

  		




  57
  
  
    
diff --git a/drivers/gpu/drm/bridge/lontium-lt9611.c b/drivers/gpu/drm/bridge/lontium-lt9611.c

  		




  58
  
  
    
index 45acff6014e1..7442e14f564f 100644

  		




  59
  
  
    
--- a/drivers/gpu/drm/bridge/lontium-lt9611.c

  		




  60
  
  
    
+++ b/drivers/gpu/drm/bridge/lontium-lt9611.c

  		




  61
  
  
    
@@ -882,6 +882,25 @@ static struct edid *lt9611_bridge_get_edid(struct drm_bridge *bridge,

  		




  62
  
  
    
 {

  		




  63
  
  
    
 	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);

  		




  64
  
  
    
 

  		




  65
  
  
    
+	if (of_device_is_compatible(lt9611->next_bridge->of_node, "hdmi-connector")) {

  		




  66
  
  
    
+		struct i2c_adapter *ddc;

  		




  67
  
  
    
+		struct device_node *ddc_node;

  		




  
  72
  
    
+	};

  		




  68
  73
  
    
+

  		




  69
  
  
    
+		ddc_node = of_parse_phandle(lt9611->next_bridge->of_node, "ddc-i2c-bus", 0);

  		




  70
  
  
    
+		if (ddc_node) {

  		




  71
  
  
    
+			ddc = of_find_i2c_adapter_by_node(ddc_node);

  		




  72
  
  
    
+			of_node_put(ddc_node);

  		




  73
  
  
    
+

  		




  74
  
  
    
+			if (ddc)

  		




  75
  
  
    
+				return drm_get_edid(connector, ddc);

  		




  76
  
  
    
+			else

  		




  77
  
  
    
+				dev_err(lt9611->dev, "The ddc i2c adapter found by node is not ready yet!\n");

  		




  78
  
  
    
+		} else {

  		




  79
  
  
    
+			dev_err(lt9611->dev, "Failed to find ddc-i2c-bus node in %pOF\n",

  		




  80
  
  
    
+				lt9611->next_bridge->of_node);

  		




  81
  
  
    
+		}

  		




  82
  
  
    
+	}

  		




  83
  
  
    
+

  		




  84
  
  
    
 	lt9611_power_on(lt9611);

  		




  85
  
  
    
 	return drm_do_get_edid(connector, lt9611_get_edid_block, lt9611);

  		




  86
  
  
    
 }

  		




  
  74
  
    
 	keypad_pins: keypad-pins {

  		




  
  75
  
    
 		pins_cols {

  		




  
  76
  
    
 			pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>,

  		




  87
  77
  
    
-- 

  		




  88
  78
  
    
2.25.1

  		




  89
  79
  
    

  		












  

    
      src/meta-mediatek-bsp/recipes-kernel/linux/linux-mtk/0001-serial-8250_mtk-Fix-UART_EFR-register-address.patch
    
  





  
  1
  
    
From d01eb92f8b42acfa775aaf738dd99e6bf7d4c812 Mon Sep 17 00:00:00 2001

  		




  
  2
  
    
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

  		




  
  3
  
    
Date: Wed, 27 Apr 2022 15:23:26 +0200

  		




  
  4
  
    
Subject: [PATCH 1/1] serial: 8250_mtk: Fix UART_EFR register address

  		




  
  5
  
    

  		




  
  6
  
    
commit bb0b197aadd928f52ce6f01f0ee977f0a08cf1be upstream.

  		




  
  7
  
    

  		




  
  8
  
    
On MediaTek SoCs, the UART IP is 16550A compatible, but there are some

  		




  
  9
  
    
specific quirks: we are declaring a register shift of 2, but this is

  		




  
  10
  
    
only valid for the majority of the registers, as there are some that

  		




  
  11
  
    
are out of the standard layout.

  		




  
  12
  
    

  		




  
  13
  
    
Specifically, this driver is using definitions from serial_reg.h, where

  		




  
  14
  
    
we have a UART_EFR register defined as 2: this results in a 0x8 offset,

  		




  
  15
  
    
but there we have the FCR register instead.

  		




  
  16
  
    

  		




  
  17
  
    
The right offset for the EFR register on MediaTek UART is at 0x98,

  		




  
  18
  
    
so, following the decimal definition convention in serial_reg.h and

  		




  
  19
  
    
accounting for the register left shift of two, add and use the correct

  		




  
  20
  
    
register address for this IP, defined as decimal 38, so that the final

  		




  
  21
  
    
calculation results in (0x26 << 2) = 0x98.

  		




  
  22
  
    

  		




  
  23
  
    
Fixes: bdbd0a7f8f03 ("serial: 8250-mtk: modify baudrate setting")

  		




  
  24
  
    
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

  		




  
  25
  
    
Cc: stable <stable@vger.kernel.org>

  		




  
  26
  
    
Link: https://lore.kernel.org/r/20220427132328.228297-2-angelogioacchino.delregno@collabora.com

  		




  
  27
  
    
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

  		




  
  28
  
    
---

  		




  
  29
  
    
 drivers/tty/serial/8250/8250_mtk.c | 15 ++++++++-------

  		




  
  30
  
    
 1 file changed, 8 insertions(+), 7 deletions(-)

  		




  
  31
  
    

  		




  
  32
  
    
diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c

  		




  
  33
  
    
index fb65dc601b23..a561aceb73ed 100644

  		




  
  34
  
    
--- a/drivers/tty/serial/8250/8250_mtk.c

  		




  
  35
  
    
+++ b/drivers/tty/serial/8250/8250_mtk.c

  		




  
  36
  
    
@@ -37,6 +37,7 @@

  		




  
  37
  
    
 #define MTK_UART_IER_RTSI	0x40	/* Enable RTS Modem status interrupt */

  		




  
  38
  
    
 #define MTK_UART_IER_CTSI	0x80	/* Enable CTS Modem status interrupt */

  		




  
  39
  
    
 

  		




  
  40
  
    
+#define MTK_UART_EFR		38	/* I/O: Extended Features Register */

  		




  
  41
  
    
 #define MTK_UART_EFR_EN		0x10	/* Enable enhancement feature */

  		




  
  42
  
    
 #define MTK_UART_EFR_RTS	0x40	/* Enable hardware rx flow control */

  		




  
  43
  
    
 #define MTK_UART_EFR_CTS	0x80	/* Enable hardware tx flow control */

  		




  
  44
  
    
@@ -169,7 +170,7 @@ static void mtk8250_dma_enable(struct uart_8250_port *up)

  		




  
  45
  
    
 		   MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);

  		




  
  46
  
    
 

  		




  
  47
  
    
 	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);

  		




  
  48
  
    
-	serial_out(up, UART_EFR, UART_EFR_ECB);

  		




  
  49
  
    
+	serial_out(up, MTK_UART_EFR, UART_EFR_ECB);

  		




  
  50
  
    
 	serial_out(up, UART_LCR, lcr);

  		




  
  51
  
    
 

  		




  
  52
  
    
 	if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)

  		




  
  53
  
    
@@ -232,7 +233,7 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)

  		




  
  54
  
    
 	int lcr = serial_in(up, UART_LCR);

  		




  
  55
  
    
 

  		




  
  56
  
    
 	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);

  		




  
  57
  
    
-	serial_out(up, UART_EFR, UART_EFR_ECB);

  		




  
  58
  
    
+	serial_out(up, MTK_UART_EFR, UART_EFR_ECB);

  		




  
  59
  
    
 	serial_out(up, UART_LCR, lcr);

  		




  
  60
  
    
 	lcr = serial_in(up, UART_LCR);

  		




  
  61
  
    
 

  		




  
  62
  
    
@@ -241,7 +242,7 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)

  		




  
  63
  
    
 		serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);

  		




  
  64
  
    
 		serial_out(up, MTK_UART_ESCAPE_EN, 0x00);

  		




  
  65
  
    
 		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);

  		




  
  66
  
    
-		serial_out(up, UART_EFR, serial_in(up, UART_EFR) &

  		




  
  67
  
    
+		serial_out(up, MTK_UART_EFR, serial_in(up, MTK_UART_EFR) &

  		




  
  68
  
    
 			(~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));

  		




  
  69
  
    
 		serial_out(up, UART_LCR, lcr);

  		




  
  70
  
    
 		mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |

  		




  
  71
  
    
@@ -255,8 +256,8 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)

  		




  
  72
  
    
 		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);

  		




  
  73
  
    
 

  		




  
  74
  
    
 		/*enable hw flow control*/

  		




  
  75
  
    
-		serial_out(up, UART_EFR, MTK_UART_EFR_HW_FC |

  		




  
  76
  
    
-			(serial_in(up, UART_EFR) &

  		




  
  77
  
    
+		serial_out(up, MTK_UART_EFR, MTK_UART_EFR_HW_FC |

  		




  
  78
  
    
+			(serial_in(up, MTK_UART_EFR) &

  		




  
  79
  
    
 			(~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));

  		




  
  80
  
    
 

  		




  
  81
  
    
 		serial_out(up, UART_LCR, lcr);

  		




  
  82
  
    
@@ -270,8 +271,8 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)

  		




  
  83
  
    
 		serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);

  		




  
  84
  
    
 

  		




  
  85
  
    
 		/*enable sw flow control */

  		




  
  86
  
    
-		serial_out(up, UART_EFR, MTK_UART_EFR_XON1_XOFF1 |

  		




  
  87
  
    
-			(serial_in(up, UART_EFR) &

  		




  
  88
  
    
+		serial_out(up, MTK_UART_EFR, MTK_UART_EFR_XON1_XOFF1 |

  		




  
  89
  
    
+			(serial_in(up, MTK_UART_EFR) &

  		




  
  90
  
    
 			(~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));

  		




  
  91
  
    
 

  		




  
  92
  
    
 		serial_out(up, UART_XON1, START_CHAR(port->state->port.tty));

  		




  
  93
  
    
-- 

  		




  
  94
  
    
2.25.1

  		




  
  95
  
    

  		












  

    
      src/meta-mediatek-bsp/recipes-kernel/linux/linux-mtk/0001-serial-8250_mtk-Fix-register-address-for-XON-XOFF-ch.patch
    
  





  
  1
  
    
From 73e12d4d33bcf04fc076382492d1cc56b77cd6af Mon Sep 17 00:00:00 2001

  		




  
  2
  
    
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

  		




  
  3
  
    
Date: Wed, 27 Apr 2022 15:23:28 +0200

  		




  
  4
  
    
Subject: [PATCH 1/1] serial: 8250_mtk: Fix register address for XON/XOFF

  		




  
  5
  
    
 character

  		




  
  6
  
    

  		




  
  7
  
    
commit e1bfdbc7daca171c74a577b3dd0b36d76bb0ffcc upstream.

  		




  
  8
  
    

  		




  
  9
  
    
The XON1/XOFF1 character registers are at offset 0xa0 and 0xa8

  		




  
  10
  
    
respectively, so we cannot use the definition in serial_port.h.

  		




  
  11
  
    

  		




  
  12
  
    
Fixes: bdbd0a7f8f03 ("serial: 8250-mtk: modify baudrate setting")

  		




  
  13
  
    
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

  		




  
  14
  
    
Cc: stable <stable@vger.kernel.org>

  		




  
  15
  
    
Link: https://lore.kernel.org/r/20220427132328.228297-4-angelogioacchino.delregno@collabora.com

  		




  
  16
  
    
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

  		




  
  17
  
    
---

  		




  
  18
  
    
 drivers/tty/serial/8250/8250_mtk.c | 7 +++++--

  		




  
  19
  
    
 1 file changed, 5 insertions(+), 2 deletions(-)

  		




  
  20
  
    

  		




  
  21
  
    
diff --git a/drivers/tty/serial/8250/8250_mtk.c b/drivers/tty/serial/8250/8250_mtk.c

  		




  
  22
  
    
index a561aceb73ed..de48a58460f4 100644

  		




  
  23
  
    
--- a/drivers/tty/serial/8250/8250_mtk.c

  		




  
  24
  
    
+++ b/drivers/tty/serial/8250/8250_mtk.c

  		




  
  25
  
    
@@ -54,6 +54,9 @@

  		




  
  26
  
    
 #define MTK_UART_TX_TRIGGER	1

  		




  
  27
  
    
 #define MTK_UART_RX_TRIGGER	MTK_UART_RX_SIZE

  		




  
  28
  
    
 

  		




  
  29
  
    
+#define MTK_UART_XON1		40	/* I/O: Xon character 1 */

  		




  
  30
  
    
+#define MTK_UART_XOFF1		42	/* I/O: Xoff character 1 */

  		




  
  31
  
    
+

  		




  
  32
  
    
 #ifdef CONFIG_SERIAL_8250_DMA

  		




  
  33
  
    
 enum dma_rx_status {

  		




  
  34
  
    
 	DMA_RX_START = 0,

  		




  
  35
  
    
@@ -275,8 +278,8 @@ static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)

  		




  
  36
  
    
 			(serial_in(up, MTK_UART_EFR) &

  		




  
  37
  
    
 			(~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));

  		




  
  38
  
    
 

  		




  
  39
  
    
-		serial_out(up, UART_XON1, START_CHAR(port->state->port.tty));

  		




  
  40
  
    
-		serial_out(up, UART_XOFF1, STOP_CHAR(port->state->port.tty));

  		




  
  41
  
    
+		serial_out(up, MTK_UART_XON1, START_CHAR(port->state->port.tty));

  		




  
  42
  
    
+		serial_out(up, MTK_UART_XOFF1, STOP_CHAR(port->state->port.tty));

  		




  
  43
  
    
 		serial_out(up, UART_LCR, lcr);

  		




  
  44
  
    
 		mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);

  		




  
  45
  
    
 		mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);

  		




  
  46
  
    
-- 

  		




  
  47
  
    
2.25.1

  		




  
  48
  
    

  		












  

    
      src/meta-mediatek-bsp/recipes-kernel/linux/linux-mtk/0002-lt9611-porting-revise-delay.patch
    
  





  
  1
  
    
From 9b14196f2c3956bf976d3b767789580c4b5439f1 Mon Sep 17 00:00:00 2001

  		




  
  2
  
    
From: Rockefeller Lin <rockefeller.lin@innocomm.com>

  		




  
  3
  
    
Date: Tue, 6 Jun 2023 09:12:00 +0800

  		




  
  4
  
    
Subject: [PATCH] lt9611 porting:revise delay

  		




  
  5
  
    

  		




  
  6
  
    
Shorten/remove some delays to save boot time.

  		




  
  7
  
    
---

  		




  
  8
  
    
 drivers/gpu/drm/bridge/lontium-lt9611.c | 4 ++--

  		




  
  9
  
    
 1 file changed, 2 insertions(+), 2 deletions(-)

  		




  
  10
  
    

  		




  
  11
  
    
diff --git a/drivers/gpu/drm/bridge/lontium-lt9611.c b/drivers/gpu/drm/bridge/lontium-lt9611.c

  		




  
  12
  
    
index 7442e14f564f..0c814d06cbd0 100644

  		




  
  13
  
    
--- a/drivers/gpu/drm/bridge/lontium-lt9611.c

  		




  
  14
  
    
+++ b/drivers/gpu/drm/bridge/lontium-lt9611.c

  		




  
  15
  
    
@@ -536,7 +536,7 @@ static void lt9611_reset(struct lt9611 *lt9611)

  		




  
  16
  
    
 	msleep(20);

  		




  
  17
  
    
 

  		




  
  18
  
    
 	gpiod_set_value_cansleep(lt9611->reset_gpio, 1);

  		




  
  19
  
    
-	msleep(100);

  		




  
  20
  
    
+	msleep(20);

  		




  
  21
  
    
 }

  		




  
  22
  
    
 

  		




  
  23
  
    
 static void lt9611_assert_5v(struct lt9611 *lt9611)

  		




  
  24
  
    
@@ -719,7 +719,7 @@ lt9611_bridge_atomic_enable(struct drm_bridge *bridge,

  		




  
  25
  
    
 	lt9611_hdmi_tx_digital(lt9611);

  		




  
  26
  
    
 	lt9611_hdmi_tx_phy(lt9611);

  		




  
  27
  
    
 

  		




  
  28
  
    
-	msleep(500);

  		




  
  29
  
    
+	//msleep(500);

  		




  
  30
  
    
 

  		




  
  31
  
    
 	lt9611_video_check(lt9611);

  		




  
  32
  
    
 

  		




  
  33
  
    
-- 

  		




  
  34
  
    
2.25.1

  		




  
  35
  
    

  		












  

    
      src/meta-mediatek-bsp/recipes-kernel/linux/linux-mtk_5.15.bb
    
  





  32
  32
  
    
	file://0008-drm-bridge-lt9611-rework-infoframes-handling.patch \

  		




  33
  33
  
    
	file://0009-drm-bridge-lt9611-stop-filtering-modes-via-the-table.patch \

  		




  34
  34
  
    
	file://0001-lt9611-porting.patch \

  		




  
  35
  
    
	file://0002-lt9611-porting-revise-delay.patch \

  		




  35
  36
  
    
	file://0001-Audio-RT5509-driver-porting.patch \

  		




  36
  37
  
    
	file://0001-Add-stereo-mode-support.patch \

  		




  
  38
  
    
	file://0001-serial-8250_mtk-Fix-UART_EFR-register-address.patch \

  		




  
  39
  
    
	file://0001-serial-8250_mtk-Fix-register-address-for-XON-XOFF-ch.patch \

  		




  37
  40
  
    
"

  		















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