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Bug #145 » inno_for_sb35_rity-kirkstone-v23.1-v001.patch

Lion Wang, 04/30/2024 01:25 PM

View differences:

src/meta-mediatek-bsp/classes/image_type_aiotflash.bbclass 2023-10-17 10:28:32.000000000 +0800 → src/meta-mediatek-bsp/classes/image_type_aiotflash.bbclass 2023-10-19 11:42:42.229309300 +0800
44 44
    cp -a ${DEPLOY_DIR_IMAGE}/rity.json ${tmp_pack_dir}
45 45
    cp -a ${DEPLOY_DIR_IMAGE}/partitions.json ${tmp_pack_dir}
46 46
    cp -a ${DEPLOY_DIR_IMAGE}/lk.bin ${tmp_pack_dir}
47
    cp -a ${DEPLOY_DIR_IMAGE}/devicetree ${tmp_pack_dir}
47 48

  
48 49
    if [ "${@oe.utils.conditional('BL2_SIGN_ENABLE', '1', '1', '', d)}" = "1" ]; then
49 50
        cp -a ${DEPLOY_DIR_IMAGE}/efuse.cfg ${tmp_pack_dir}
src/meta-mediatek-bsp/conf/machine/mt8365-sb35.conf 2023-10-17 10:28:32.000000000 +0800 → src/meta-mediatek-bsp/conf/machine/mt8365-sb35.conf 2023-10-19 11:43:56.555096400 +0800
5 5
KERNEL_DEVICETREE = "mediatek/mt8365-sb35.dtb"
6 6

  
7 7
# U-Boot
8
UBOOT_MACHINE = "mt8365_pumpkin_defconfig"
8
UBOOT_MACHINE = "mt8365_sb35_defconfig"
9 9

  
10 10
# libdram
11 11
LIBDRAM_BOARD_NAME = "mt8365-sb35"
......
13 13
# LK
14 14
LK_BOARD_NAME = "${LIBDRAM_BOARD_NAME}"
15 15

  
16
MACHINE_FEATURES:append = " alsa usbgadget usbhost wifi"
16
MACHINE_FEATURES:append = " alsa usbgadget usbhost wifi  screen"
17 17

  
18 18
MACHINEOVERRIDES =. "mt8365-sb35:i350-sb35:genio-350-sb35:"
src/meta-mediatek-bsp/recipes-bsp/alsa-state/mt8365-sb35/asound.conf 2023-10-17 10:28:32.000000000 +0800 → src/meta-mediatek-bsp/recipes-bsp/alsa-state/mt8365-sb35/asound.conf 2023-10-19 11:44:53.434846700 +0800
22 22
       }
23 23
}
24 24

  
25
pcm.speaker {
26
       type plug
27
       slave {
28
               pcm "hw:mtsndcard,1,0"
29
               channels 2
30
       }
31
}
32

  
25 33
pcm.line {
26 34
       type asym
27 35
       playback.pcm "jack_speaker"
src/meta-mediatek-bsp/recipes-bsp/alsa-state/mt8365-sb35/asound.state 2023-10-17 10:28:32.000000000 +0800 → src/meta-mediatek-bsp/recipes-bsp/alsa-state/mt8365-sb35/asound.state 2023-10-19 11:45:10.159512800 +0800
12 12
	control.2 {
13 13
		iface MIXER
14 14
		name 'O00 I07 Switch'
15
		value false
15
		value true
16 16
		comment {
17 17
			access 'read write'
18 18
			type BOOLEAN
......
32 32
	control.4 {
33 33
		iface MIXER
34 34
		name 'O01 I08 Switch'
35
		value false
35
		value true
36 36
		comment {
37 37
			access 'read write'
38 38
			type BOOLEAN
src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0001-Add-dedicated-sb35-defconfig-and-dts-files.patch 1970-01-01 08:00:00.000000000 +0800 → src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0001-Add-dedicated-sb35-defconfig-and-dts-files.patch 2023-10-04 14:32:37.000000000 +0800
1
From 05bb8f47e4d376d05f30ef95b170ac51aaac6478 Mon Sep 17 00:00:00 2001
2
From: Rockefeller Lin <rockefeller.lin@innocomm.com>
3
Date: Wed, 24 May 2023 12:18:47 +0800
4
Subject: [PATCH 1/1] Add dedicated sb35 defconfig and dts files
5

  
6
The defconfig and dts files are copied from mt8365-pumpkin.
7
---
8
 arch/arm/dts/Makefile         |   1 +
9
 arch/arm/dts/mt8365-sb35.dts  | 164 ++++++++++++++++++++++++++++++++++
10
 configs/mt8365_sb35_defconfig |  97 ++++++++++++++++++++
11
 3 files changed, 262 insertions(+)
12
 create mode 100644 arch/arm/dts/mt8365-sb35.dts
13
 create mode 100644 configs/mt8365_sb35_defconfig
14

  
15
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
16
index 7b216bf62a..ac852fab60 100644
17
--- a/arch/arm/dts/Makefile
18
+++ b/arch/arm/dts/Makefile
19
@@ -1237,6 +1237,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
20
 	mt8195-demo.dtb \
21
 	mt8195-evb-ufs.dtb \
22
 	mt8365-pumpkin.dtb \
23
+	mt8365-sb35.dtb \
24
 	mt8512-bm1-emmc.dtb \
25
 	mt8516-pumpkin.dtb \
26
 	mt8518-ap1-emmc.dtb \
27
diff --git a/arch/arm/dts/mt8365-sb35.dts b/arch/arm/dts/mt8365-sb35.dts
28
new file mode 100644
29
index 0000000000..5f57657026
30
--- /dev/null
31
+++ b/arch/arm/dts/mt8365-sb35.dts
32
@@ -0,0 +1,164 @@
33
+// SPDX-License-Identifier: GPL-2.0 OR MIT
34
+/*
35
+ * Copyright (C) 2021 BayLibre SAS.
36
+ * Author: Fabien Parent <fparent@baylibre.com>
37
+ */
38
+
39
+/dts-v1/;
40
+
41
+#include <config.h>
42
+#include "mt8365.dtsi"
43
+#include "mt6357.dtsi"
44
+
45
+/ {
46
+	model = "MT8365 SB35 board";
47
+	compatible = "mediatek,mt8365-sb35", "mediatek,mt8365";
48
+
49
+	memory@40000000 {
50
+		device_type = "memory";
51
+		reg = <0 0x40000000 0 0x40000000>;
52
+	};
53
+
54
+	firmware: firmware {
55
+		optee {
56
+			compatible = "linaro,optee-tz";
57
+			method = "smc";
58
+		};
59
+	};
60
+
61
+	reserved-memory {
62
+		#address-cells = <2>;
63
+		#size-cells = <2>;
64
+		ranges;
65
+
66
+		/* 192 KiB reserved for ARM Trusted Firmware (BL31) */
67
+		bl31_secmon_reserved: secmon@43000000 {
68
+			no-map;
69
+			reg = <0 0x43000000 0 0x30000>;
70
+		};
71
+
72
+		/* 12 MiB reserved for OP-TEE (BL32)
73
+		 * +-----------------------+ 0x43e0_0000
74
+		 * |      SHMEM 2MiB       |
75
+		 * +-----------------------+ 0x43c0_0000
76
+		 * |        | TA_RAM  8MiB |
77
+		 * + TZDRAM +--------------+ 0x4340_0000
78
+		 * |        | TEE_RAM 2MiB |
79
+		 * +-----------------------+ 0x4320_0000
80
+		 */
81
+		optee_reserved: optee@43200000 {
82
+			no-map;
83
+			reg = <0 0x43200000 0 0x00c00000>;
84
+		};
85
+	};
86
+
87
+	chosen {
88
+		stdout-path = &uart0;
89
+	};
90
+};
91
+
92
+&uart0 {
93
+	status = "okay";
94
+};
95
+
96
+&mmc0 {
97
+	bus-width = <4>;
98
+	max-frequency = <200000000>;
99
+	cap-mmc-highspeed;
100
+	mmc-hs200-1_8v;
101
+	cap-mmc-hw-reset;
102
+	vmmc-supply = <&mt6357_vemc_reg>;
103
+	vqmmc-supply = <&mt6357_vio18_reg>;
104
+	non-removable;
105
+	status = "okay";
106
+};
107
+
108
+&usb {
109
+	status = "okay";
110
+};
111
+
112
+&ssusb {
113
+	mediatek,force-vbus;
114
+	maximum-speed = "high-speed";
115
+	dr_mode = "peripheral";
116
+	status = "okay";
117
+};
118
+
119
+&dpi0 {
120
+	dpi_dual_edge;
121
+	pinctrl-names = "default", "sleep";
122
+	pinctrl-0 = <&dpi_pin_func>;
123
+	pinctrl-1 = <&dpi_pin_gpio>;
124
+	status = "okay";
125
+};
126
+
127
+&i2c0 {
128
+	pinctrl-names = "default";
129
+	pinctrl-0 = <&i2c0_pins_default>;
130
+	clock-frequency = <100000>;
131
+	status = "okay";
132
+};
133
+
134
+&i2c1 {
135
+	pinctrl-names = "default";
136
+	pinctrl-0 = <&i2c1_pins_default>;
137
+	clock-frequency = <100000>;
138
+	status = "okay";
139
+
140
+	it66121hdmitx {
141
+		compatible = "ite,it66121";
142
+		reg = <0x4c>;
143
+		pinctrl-names = "default";
144
+		pinctrl-0 = <&ite_pins_default>;
145
+		vcn33-supply = <&mt6357_vcn33_bt_reg>;
146
+		vcn18-supply = <&mt6357_vcn18_reg>;
147
+		vrf12-supply = <&mt6357_vrf12_reg>;
148
+		reset-gpios = <&gpio 69 GPIO_ACTIVE_LOW>;
149
+	};
150
+};
151
+
152
+&i2c2 {
153
+	pinctrl-names = "default";
154
+	pinctrl-0 = <&i2c2_pins_default>;
155
+	clock-frequency = <100000>;
156
+	status = "okay";
157
+};
158
+
159
+&pio {
160
+	dpi_pin_func: dpi_pin_func {
161
+		function = "dpi";
162
+		groups =  "dpi_enable";
163
+	};
164
+
165
+	dpi_pin_gpio: dpi_pin_gpio {
166
+		function = "dpi";
167
+		groups =  "dpi_sleep";
168
+	};
169
+
170
+	i2c0_pins_default: i2c0_pins_default {
171
+		function = "i2c";
172
+		groups = "i2c0";
173
+	};
174
+
175
+	i2c1_pins_default: i2c1_pins_default {
176
+		function = "i2c";
177
+		groups = "i2c1";
178
+	};
179
+
180
+	i2c2_pins_default: i2c2_pins_default {
181
+		function = "i2c";
182
+		groups = "i2c2";
183
+	};
184
+
185
+	ite_pins_default: ite_pins_default {
186
+		pins_rst_ite {
187
+			pinmux = <MT8365_PIN_69_CMDAT1__FUNC_GPIO69>;
188
+			output-high;
189
+		};
190
+
191
+		pins_irq_ite {
192
+			pinmux = <MT8365_PIN_68_CMDAT0__FUNC_GPIO68>;
193
+			input-enable;
194
+		};
195
+	};
196
+};
197
diff --git a/configs/mt8365_sb35_defconfig b/configs/mt8365_sb35_defconfig
198
new file mode 100644
199
index 0000000000..3c25705aab
200
--- /dev/null
201
+++ b/configs/mt8365_sb35_defconfig
202
@@ -0,0 +1,97 @@
203
+CONFIG_ARM=y
204
+CONFIG_COUNTER_FREQUENCY=13000000
205
+CONFIG_POSITION_INDEPENDENT=y
206
+CONFIG_ARCH_MEDIATEK=y
207
+CONFIG_SYS_TEXT_BASE=0x4c000000
208
+CONFIG_SYS_MALLOC_F_LEN=0x4000
209
+CONFIG_NR_DRAM_BANKS=1
210
+CONFIG_ENV_SIZE=0x1000
211
+CONFIG_ENV_OFFSET=0x0
212
+CONFIG_DM_GPIO=y
213
+CONFIG_DEFAULT_DEVICE_TREE="mt8365-sb35"
214
+CONFIG_TARGET_MT8365=y
215
+CONFIG_DEBUG_UART_BASE=0x11002000
216
+CONFIG_DEBUG_UART_CLOCK=26000000
217
+CONFIG_SYS_LOAD_ADDR=0x4c000000
218
+CONFIG_DEBUG_UART=y
219
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
220
+# CONFIG_ANDROID_BOOT_IMAGE is not set
221
+CONFIG_FIT=y
222
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
223
+CONFIG_USE_BOOTCOMMAND=y
224
+CONFIG_BOOTCOMMAND="run distro_bootcmd"
225
+CONFIG_DEFAULT_FDT_FILE="mt8365-sb35"
226
+# CONFIG_DISPLAY_BOARDINFO is not set
227
+CONFIG_HUSH_PARSER=y
228
+# CONFIG_CMD_CONSOLE is not set
229
+# CONFIG_CMD_BOOTD is not set
230
+# CONFIG_CMD_ELF is not set
231
+# CONFIG_CMD_GO is not set
232
+# CONFIG_CMD_IMI is not set
233
+# CONFIG_CMD_XIMG is not set
234
+# CONFIG_CMD_CRC32 is not set
235
+CONFIG_CMD_CLK=y
236
+CONFIG_CMD_DFU=y
237
+CONFIG_CMD_DM=y
238
+CONFIG_CMD_GPT=y
239
+# CONFIG_RANDOM_UUID is not set
240
+CONFIG_CMD_I2C=y
241
+# CONFIG_CMD_LOADB is not set
242
+# CONFIG_CMD_LOADS is not set
243
+CONFIG_CMD_MMC=y
244
+CONFIG_CMD_PART=y
245
+CONFIG_CMD_USB=y
246
+CONFIG_CMD_USB_MASS_STORAGE=y
247
+# CONFIG_CMD_ITEST is not set
248
+CONFIG_CMD_DHCP=y
249
+# CONFIG_CMD_BLOCK_CACHE is not set
250
+CONFIG_CMD_SYSBOOT=y
251
+CONFIG_CMD_EXT4=y
252
+CONFIG_CMD_FAT=y
253
+CONFIG_CMD_FS_GENERIC=y
254
+CONFIG_ISO_PARTITION=y
255
+CONFIG_ENV_IS_IN_MMC=y
256
+CONFIG_SYS_MMC_ENV_PART=2
257
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
258
+CONFIG_ENV_IMPORT_FDT=y
259
+CONFIG_DEVRES=y
260
+CONFIG_CLK=y
261
+CONFIG_DFU_MMC=y
262
+CONFIG_USB_FUNCTION_FASTBOOT=y
263
+CONFIG_FASTBOOT_BUF_ADDR=0x4d000000
264
+CONFIG_FASTBOOT_BUF_SIZE=0x8000000
265
+CONFIG_FASTBOOT_FLASH=y
266
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
267
+CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
268
+CONFIG_DM_I2C=y
269
+CONFIG_SYS_I2C_MTK=y
270
+# CONFIG_INPUT is not set
271
+# CONFIG_MMC_QUIRKS is not set
272
+CONFIG_MMC_MTK=y
273
+CONFIG_PHY=y
274
+CONFIG_PHY_MTK_TPHY=y
275
+CONFIG_PINCTRL=y
276
+CONFIG_PINCONF=y
277
+CONFIG_PINCTRL_MT8365=y
278
+CONFIG_DM_RTC=y
279
+CONFIG_RTC_EMULATION=y
280
+CONFIG_BAUDRATE=921600
281
+CONFIG_DM_SERIAL=y
282
+CONFIG_DEBUG_UART_ANNOUNCE=y
283
+CONFIG_MTK_SERIAL=y
284
+CONFIG_USB=y
285
+CONFIG_DM_USB_GADGET=y
286
+CONFIG_USB_XHCI_HCD=y
287
+CONFIG_USB_XHCI_MTK=y
288
+CONFIG_USB_MTU3=y
289
+CONFIG_USB_STORAGE=y
290
+CONFIG_USB_KEYBOARD=y
291
+CONFIG_USB_HOST_ETHER=y
292
+CONFIG_USB_GADGET=y
293
+CONFIG_USB_GADGET_VENDOR_NUM=0x0e8d
294
+CONFIG_USB_GADGET_PRODUCT_NUM=0x201c
295
+CONFIG_USB_ETHER=y
296
+CONFIG_WDT=y
297
+CONFIG_WDT_MTK=y
298
+CONFIG_OF_LIBFDT_OVERLAY=y
299
+CONFIG_LMB_MAX_REGIONS=16
300
-- 
301
2.25.1
302

  
src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0001-Set-bootdelay-to-0-to-save-2secs-of-booting-time.patch 1970-01-01 08:00:00.000000000 +0800 → src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0001-Set-bootdelay-to-0-to-save-2secs-of-booting-time.patch 2023-10-04 14:32:37.000000000 +0800
1
From 6061bcfb8f1dfc47714beae179be4bc4e4223062 Mon Sep 17 00:00:00 2001
2
From: Rockefeller Lin <rockefeller.lin@innocomm.com>
3
Date: Fri, 7 Apr 2023 03:29:44 +0000
4
Subject: [PATCH] Set bootdelay to 0 to save ~2secs of booting time
5

  
6
Set bootdelay to 0 to save ~2secs of booting time
7
---
8
 configs/mt8365_sb35_defconfig        | 1 +
9
 1 files changed, 1 insertions(+)
10

  
11
diff --git a/configs/mt8365_sb35_defconfig b/configs/mt8365_sb35_defconfig
12
index 204b97244b..ccf8c26892 100644
13
--- a/configs/mt8365_sb35_defconfig
14
+++ b/configs/mt8365_sb35_defconfig
15
@@ -96,3 +96,4 @@ CONFIG_WDT=y
16
 CONFIG_WDT_MTK=y
17
 CONFIG_OF_LIBFDT_OVERLAY=y
18
 CONFIG_LMB_MAX_REGIONS=16
19
+CONFIG_BOOTDELAY=0
20
-- 
21
2.25.1
22

  
src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0002-Remove-DPI-and-it66121-from-sb35-dts.patch 1970-01-01 08:00:00.000000000 +0800 → src/meta-mediatek-bsp/recipes-bsp/u-boot/files/0002-Remove-DPI-and-it66121-from-sb35-dts.patch 2023-10-04 14:32:37.000000000 +0800
1
From 29ec664a6ac95151a2967527c1a9d04603aa62c3 Mon Sep 17 00:00:00 2001
2
From: Rockefeller Lin <rockefeller.lin@innocomm.com>
3
Date: Wed, 24 May 2023 12:57:31 +0800
4
Subject: [PATCH 1/1] Remove DPI and it66121 from sb35 dts
5

  
6
The HDMI bridge on SB35 EVK is lt9611 and interface is DSI, so remove
7
DPI and it66121 nodes.
8

  
9
The lt9611 node is added but disable it because MTK DSI is still not supported yet.
10
---
11
 arch/arm/dts/mt8365-sb35.dts | 66 +++++++++++++++++++-----------------
12
 1 file changed, 35 insertions(+), 31 deletions(-)
13

  
14
diff --git a/arch/arm/dts/mt8365-sb35.dts b/arch/arm/dts/mt8365-sb35.dts
15
index 5f57657026..b645d276a6 100644
16
--- a/arch/arm/dts/mt8365-sb35.dts
17
+++ b/arch/arm/dts/mt8365-sb35.dts
18
@@ -84,14 +84,6 @@
19
 	status = "okay";
20
 };
21
 
22
-&dpi0 {
23
-	dpi_dual_edge;
24
-	pinctrl-names = "default", "sleep";
25
-	pinctrl-0 = <&dpi_pin_func>;
26
-	pinctrl-1 = <&dpi_pin_gpio>;
27
-	status = "okay";
28
-};
29
-
30
 &i2c0 {
31
 	pinctrl-names = "default";
32
 	pinctrl-0 = <&i2c0_pins_default>;
33
@@ -105,16 +97,15 @@
34
 	clock-frequency = <100000>;
35
 	status = "okay";
36
 
37
-	it66121hdmitx {
38
-		compatible = "ite,it66121";
39
+#if 0
40
+	lt9611hdmitx {
41
+		compatible = "lontium,lt9611";
42
 		reg = <0x4c>;
43
 		pinctrl-names = "default";
44
-		pinctrl-0 = <&ite_pins_default>;
45
-		vcn33-supply = <&mt6357_vcn33_bt_reg>;
46
-		vcn18-supply = <&mt6357_vcn18_reg>;
47
-		vrf12-supply = <&mt6357_vrf12_reg>;
48
-		reset-gpios = <&gpio 69 GPIO_ACTIVE_LOW>;
49
+		pinctrl-0 = <&hdmi_pins_default>;
50
+		reset-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
51
 	};
52
+#endif
53
 };
54
 
55
 &i2c2 {
56
@@ -125,16 +116,6 @@
57
 };
58
 
59
 &pio {
60
-	dpi_pin_func: dpi_pin_func {
61
-		function = "dpi";
62
-		groups =  "dpi_enable";
63
-	};
64
-
65
-	dpi_pin_gpio: dpi_pin_gpio {
66
-		function = "dpi";
67
-		groups =  "dpi_sleep";
68
-	};
69
-
70
 	i2c0_pins_default: i2c0_pins_default {
71
 		function = "i2c";
72
 		groups = "i2c0";
73
@@ -150,15 +131,38 @@
74
 		groups = "i2c2";
75
 	};
76
 
77
-	ite_pins_default: ite_pins_default {
78
-		pins_rst_ite {
79
-			pinmux = <MT8365_PIN_69_CMDAT1__FUNC_GPIO69>;
80
-			output-high;
81
+#if 0
82
+	hdmi_pins_default: hdmi_pins_default {
83
+		pin_pwr_en {
84
+			pinmux = <MT8365_PIN_4_GPIO4__FUNC_GPIO4>;
85
+			output-low;
86
 		};
87
 
88
-		pins_irq_ite {
89
-			pinmux = <MT8365_PIN_68_CMDAT0__FUNC_GPIO68>;
90
+		pin_lt9611_1v8_en {
91
+			pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_GPIO19>;
92
+			output-low;
93
+		};
94
+
95
+		pin_lt9611_rst {
96
+			pinmux = <MT8365_PIN_20_LCM_RST__FUNC_GPIO20>;
97
+			output-low;
98
+		};
99
+
100
+		pin_lt9611_3v3_en {
101
+			pinmux = <MT8365_PIN_21_DSI_TE__FUNC_GPIO21>;
102
+			output-low;
103
+		};
104
+
105
+		pin_lt9611_intr {
106
+			pinmux = <MT8365_PIN_125_DMIC2_DAT1__FUNC_GPIO125>;
107
 			input-enable;
108
+			bias-pull-up;
109
+		};
110
+
111
+		pin_dsi_sel {
112
+			pinmux = <MT8365_PIN_2_GPIO2__FUNC_GPIO2>;
113
+			output-low;
114
 		};
115
 	};
116
+#endif
117
 };
118
-- 
119
2.25.1
120

  
src/meta-mediatek-bsp/recipes-bsp/u-boot/u-boot_git.bb 2023-10-17 10:28:32.000000000 +0800 → src/meta-mediatek-bsp/recipes-bsp/u-boot/u-boot_git.bb 2023-10-19 11:46:53.344883500 +0800
4 4
SRC_URI += " \
5 5
	file://0001-Revert-cmd-pxe_utils-Check-fdtcontroladdr-in-label_b.patch \
6 6
	file://fw_env.config \
7
	file://0001-Add-dedicated-sb35-defconfig-and-dts-files.patch \
8
	file://0002-Remove-DPI-and-it66121-from-sb35-dts.patch \
9
	file://0001-Set-bootdelay-to-0-to-save-2secs-of-booting-time.patch \
7 10
"
src/meta-mediatek-bsp/recipes-kernel/dtbo/dtbo.bb 2023-10-17 10:28:32.000000000 +0800 → src/meta-mediatek-bsp/recipes-kernel/dtbo/dtbo.bb 2023-10-19 11:48:42.357910200 +0800
105 105

  
106 106
SRC_URI:append:mt8365-sb35 = " \
107 107
	file://panel-raspberrypi.dts \
108
	file://rs232.dts \
109
	file://spidev.dts \
108 110
"
109 111

  
110 112
SRC_URI:append:mt8516-pumpkin = " \
src/meta-mediatek-bsp/recipes-kernel/dtbo/mt8365-sb35/rs232.dts 1970-01-01 08:00:00.000000000 +0800 → src/meta-mediatek-bsp/recipes-kernel/dtbo/mt8365-sb35/rs232.dts 2023-10-04 14:32:37.000000000 +0800
1
/dts-v1/;
2
/plugin/;
3

  
4
#include <dt-bindings/gpio/gpio.h>
5
#include <dt-bindings/pinctrl/mt8365-pinfunc.h>
6

  
7
/ {
8
	fragment@0 {
9
		target = <&pio>;
10
		__overlay__ {
11
			rs232_pins: rs232-pins {
12
				pins_rx {
13
					pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>;
14
					input-enable;
15
					bias-pull-up;
16
				};
17
				pins_tx_cts_rts {
18
					pinmux = <MT8365_PIN_38_UTXD1__FUNC_UTXD1>,
19
						<MT8365_PIN_39_URXD2__FUNC_UCTS1>,
20
						<MT8365_PIN_40_UTXD2__FUNC_URTS1>;
21
				};
22
				pins_rs232_shdn {
23
					pinmux = <MT8365_PIN_10_GPIO10__FUNC_GPIO10>;
24
					output-high;
25
				};
26
				pins_rs232_en {
27
					pinmux = <MT8365_PIN_8_GPIO8__FUNC_GPIO8>;
28
					output-high;
29
				};
30
			};
31
		};
32
	};
33

  
34
	fragment@1 {
35
		target = <&uart1>;
36
		__overlay__ {
37
			pinctrl-0 = <&rs232_pins>;
38
			pinctrl-names = "default";
39
			status = "okay";
40
		};
41
	};
42
};
src/meta-mediatek-bsp/recipes-kernel/dtbo/mt8365-sb35/spidev.dts 1970-01-01 08:00:00.000000000 +0800 → src/meta-mediatek-bsp/recipes-kernel/dtbo/mt8365-sb35/spidev.dts 2023-10-04 14:32:37.000000000 +0800
1
/dts-v1/;
2
/plugin/;
3

  
4
#include <dt-bindings/gpio/gpio.h>
5
#include <dt-bindings/pinctrl/mt8365-pinfunc.h>
6

  
7
/ {
8
	fragment@0 {
9
		target = <&pio>;
10
		__overlay__ {
11
			spi_pins: spi-pins {
12
                 pins {
13
                     pinmux =  <MT8365_PIN_9_GPIO9__FUNC_SPI_CSB>,
14
                              <MT8365_PIN_10_GPIO10__FUNC_SPI_MI>;
15
                     bias-disable;
16
                 };
17
                 out_pins {
18
                         pinmux = <MT8365_PIN_8_GPIO8__FUNC_SPI_CLK>,
19
                                  <MT8365_PIN_11_GPIO11__FUNC_SPI_MO>;
20
                         bias-disable;
21
                         drive-strength = <MTK_DRIVE_6mA>;
22
                };
23
          };
24
		};
25
	};
26

  
27
	fragment@1 {
28
		target = <&spi>;
29
		__overlay__ {
30
			pinctrl-0 = <&spi_pins>;
31
			pinctrl-names = "default";
32
			mediatek,pad-select = <0>;
33
			status = "okay";
34

  
35
			spidev@0 {
36
				compatible = "mediatek,aiot-board";
37
				spi-max-frequency = <50000000>;
38
				reg = <0>;
39
			};
40
		};
41
	};
42
};
src/meta-mediatek-bsp/recipes-kernel/linux/linux-mtk/00001-v23.1-kernel.patch 1970-01-01 08:00:00.000000000 +0800 → src/meta-mediatek-bsp/recipes-kernel/linux/linux-mtk/00001-v23.1-kernel.patch 2023-10-27 10:58:37.315119581 +0800
1
diff -Naur a/drivers/gpu/drm/bridge/lontium-lt9611.c b/drivers/gpu/drm/bridge/lontium-lt9611.c
2
--- a/drivers/gpu/drm/bridge/lontium-lt9611.c	2023-10-17 10:56:33.000000000 +0800
3
+++ b/drivers/gpu/drm/bridge/lontium-lt9611.c	2023-10-17 10:54:18.000000000 +0800
4
@@ -17,6 +17,7 @@
5
 #include <drm/drm_atomic_helper.h>
6
 #include <drm/drm_bridge.h>
7
 #include <drm/drm_mipi_dsi.h>
8
+#include <drm/drm_of.h>
9
 #include <drm/drm_print.h>
10
 #include <drm/drm_probe_helper.h>
11
 
12
@@ -31,7 +32,7 @@
13
 struct lt9611 {
14
 	struct device *dev;
15
 	struct drm_bridge bridge;
16
-	struct drm_connector connector;
17
+	struct drm_bridge *next_bridge;
18
 
19
 	struct regmap *regmap;
20
 
21
@@ -56,7 +57,6 @@
22
 	enum drm_connector_status status;
23
 
24
 	u8 edid_buf[EDID_SEG_SIZE];
25
-	u32 vic;
26
 };
27
 
28
 #define LT9611_PAGE_CONTROL	0xff
29
@@ -82,34 +82,11 @@
30
 	.num_ranges = ARRAY_SIZE(lt9611_ranges),
31
 };
32
 
33
-struct lt9611_mode {
34
-	u16 hdisplay;
35
-	u16 vdisplay;
36
-	u8 vrefresh;
37
-	u8 lanes;
38
-	u8 intfs;
39
-};
40
-
41
-static struct lt9611_mode lt9611_modes[] = {
42
-	{ 3840, 2160, 30, 4, 2 }, /* 3840x2160 24bit 30Hz 4Lane 2ports */
43
-	{ 1920, 1080, 60, 4, 1 }, /* 1080P 24bit 60Hz 4lane 1port */
44
-	{ 1920, 1080, 30, 3, 1 }, /* 1080P 24bit 30Hz 3lane 1port */
45
-	{ 1920, 1080, 24, 3, 1 },
46
-	{ 720, 480, 60, 4, 1 },
47
-	{ 720, 576, 50, 2, 1 },
48
-	{ 640, 480, 60, 2, 1 },
49
-};
50
-
51
 static struct lt9611 *bridge_to_lt9611(struct drm_bridge *bridge)
52
 {
53
 	return container_of(bridge, struct lt9611, bridge);
54
 }
55
 
56
-static struct lt9611 *connector_to_lt9611(struct drm_connector *connector)
57
-{
58
-	return container_of(connector, struct lt9611, connector);
59
-}
60
-
61
 static int lt9611_mipi_input_analog(struct lt9611 *lt9611)
62
 {
63
 	const struct reg_sequence reg_cfg[] = {
64
@@ -157,12 +134,12 @@
65
 	hactive = mode->hdisplay;
66
 	hsync_len = mode->hsync_end - mode->hsync_start;
67
 	hfront_porch = mode->hsync_start - mode->hdisplay;
68
-	hsync_porch = hsync_len + mode->htotal - mode->hsync_end;
69
+	hsync_porch = mode->htotal - mode->hsync_start;
70
 
71
 	vactive = mode->vdisplay;
72
 	vsync_len = mode->vsync_end - mode->vsync_start;
73
 	vfront_porch = mode->vsync_start - mode->vdisplay;
74
-	vsync_porch = vsync_len + mode->vtotal - mode->vsync_end;
75
+	vsync_porch = mode->vtotal - mode->vsync_start;
76
 
77
 	regmap_write(lt9611->regmap, 0x830d, (u8)(v_total / 256));
78
 	regmap_write(lt9611->regmap, 0x830e, (u8)(v_total % 256));
79
@@ -185,12 +162,14 @@
80
 
81
 	regmap_write(lt9611->regmap, 0x8319, (u8)(hfront_porch % 256));
82
 
83
-	regmap_write(lt9611->regmap, 0x831a, (u8)(hsync_porch / 256));
84
+	regmap_write(lt9611->regmap, 0x831a, (u8)(hsync_porch / 256) |
85
+						((hfront_porch / 256) << 4));
86
 	regmap_write(lt9611->regmap, 0x831b, (u8)(hsync_porch % 256));
87
 }
88
 
89
-static void lt9611_pcr_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode)
90
+static void lt9611_pcr_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int postdiv)
91
 {
92
+	unsigned int pcr_m = mode->clock * 5 * postdiv / 27000;
93
 	const struct reg_sequence reg_cfg[] = {
94
 		{ 0x830b, 0x01 },
95
 		{ 0x830c, 0x10 },
96
@@ -205,7 +184,6 @@
97
 
98
 		/* stage 2 */
99
 		{ 0x834a, 0x40 },
100
-		{ 0x831d, 0x10 },
101
 
102
 		/* MK limit */
103
 		{ 0x832d, 0x38 },
104
@@ -220,30 +198,28 @@
105
 		{ 0x8325, 0x00 },
106
 		{ 0x832a, 0x01 },
107
 		{ 0x834a, 0x10 },
108
-		{ 0x831d, 0x10 },
109
-		{ 0x8326, 0x37 },
110
 	};
111
+	u8 pol = 0x10;
112
 
113
-	regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
114
+	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
115
+		pol |= 0x2;
116
+	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
117
+		pol |= 0x1;
118
+	regmap_write(lt9611->regmap, 0x831d, pol);
119
 
120
-	switch (mode->hdisplay) {
121
-	case 640:
122
-		regmap_write(lt9611->regmap, 0x8326, 0x14);
123
-		break;
124
-	case 1920:
125
-		regmap_write(lt9611->regmap, 0x8326, 0x37);
126
-		break;
127
-	case 3840:
128
+	if (mode->hdisplay == 3840)
129
 		regmap_multi_reg_write(lt9611->regmap, reg_cfg2, ARRAY_SIZE(reg_cfg2));
130
-		break;
131
-	}
132
+	else
133
+		regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
134
+
135
+	regmap_write(lt9611->regmap, 0x8326, pcr_m);
136
 
137
 	/* pcr rst */
138
 	regmap_write(lt9611->regmap, 0x8011, 0x5a);
139
 	regmap_write(lt9611->regmap, 0x8011, 0xfa);
140
 }
141
 
142
-static int lt9611_pll_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode)
143
+static int lt9611_pll_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int *postdiv)
144
 {
145
 	unsigned int pclk = mode->clock;
146
 	const struct reg_sequence reg_cfg[] = {
147
@@ -257,16 +233,21 @@
148
 		{ 0x8126, 0x55 },
149
 		{ 0x8127, 0x66 },
150
 		{ 0x8128, 0x88 },
151
+		{ 0x812a, 0x20 },
152
 	};
153
 
154
 	regmap_multi_reg_write(lt9611->regmap, reg_cfg, ARRAY_SIZE(reg_cfg));
155
 
156
-	if (pclk > 150000)
157
+	if (pclk > 150000) {
158
 		regmap_write(lt9611->regmap, 0x812d, 0x88);
159
-	else if (pclk > 70000)
160
+		*postdiv = 1;
161
+	} else if (pclk > 70000) {
162
 		regmap_write(lt9611->regmap, 0x812d, 0x99);
163
-	else
164
+		*postdiv = 2;
165
+	} else {
166
 		regmap_write(lt9611->regmap, 0x812d, 0xaa);
167
+		*postdiv = 4;
168
+	}
169
 
170
 	/*
171
 	 * first divide pclk by 2 first
172
@@ -351,12 +332,51 @@
173
 	return temp;
174
 }
175
 
176
+static void lt9611_hdmi_set_infoframes(struct lt9611 *lt9611,
177
+				       struct drm_connector *connector,
178
+				       struct drm_display_mode *mode)
179
+{
180
+	union hdmi_infoframe infoframe;
181
+	ssize_t len;
182
+	u8 iframes = 0x0a; /* UD1 infoframe */
183
+	u8 buf[32];
184
+	int ret;
185
+	int i;
186
+
187
+	ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe.avi,
188
+						       connector,
189
+						       mode);
190
+	if (ret < 0)
191
+		goto out;
192
+
193
+	len = hdmi_infoframe_pack(&infoframe, buf, sizeof(buf));
194
+	if (len < 0)
195
+		goto out;
196
+
197
+	for (i = 0; i < len; i++)
198
+		regmap_write(lt9611->regmap, 0x8440 + i, buf[i]);
199
+
200
+	ret = drm_hdmi_vendor_infoframe_from_display_mode(&infoframe.vendor.hdmi,
201
+							  connector,
202
+							  mode);
203
+	if (ret < 0)
204
+		goto out;
205
+
206
+	len = hdmi_infoframe_pack(&infoframe, buf, sizeof(buf));
207
+	if (len < 0)
208
+		goto out;
209
+
210
+	for (i = 0; i < len; i++)
211
+		regmap_write(lt9611->regmap, 0x8474 + i, buf[i]);
212
+
213
+	iframes |= 0x20;
214
+
215
+out:
216
+	regmap_write(lt9611->regmap, 0x843d, iframes); /* UD1 infoframe */
217
+}
218
+
219
 static void lt9611_hdmi_tx_digital(struct lt9611 *lt9611)
220
 {
221
-	regmap_write(lt9611->regmap, 0x8443, 0x46 - lt9611->vic);
222
-	regmap_write(lt9611->regmap, 0x8447, lt9611->vic);
223
-	regmap_write(lt9611->regmap, 0x843d, 0x0a); /* UD1 infoframe */
224
-
225
 	regmap_write(lt9611->regmap, 0x82d6, 0x8c);
226
 	regmap_write(lt9611->regmap, 0x82d7, 0x04);
227
 }
228
@@ -446,12 +466,11 @@
229
 		{ 0x8023, 0x01 },
230
 		{ 0x8157, 0x03 }, /* set addr pin as output */
231
 		{ 0x8149, 0x0b },
232
-		{ 0x8151, 0x30 }, /* disable IRQ */
233
+
234
 		{ 0x8102, 0x48 }, /* MIPI Rx power down */
235
 		{ 0x8123, 0x80 },
236
 		{ 0x8130, 0x00 },
237
-		{ 0x8100, 0x01 }, /* bandgap power down */
238
-		{ 0x8101, 0x00 }, /* system clk power down */
239
+		{ 0x8011, 0x0a },
240
 	};
241
 
242
 	regmap_multi_reg_write(lt9611->regmap,
243
@@ -517,7 +536,7 @@
244
 	msleep(20);
245
 
246
 	gpiod_set_value_cansleep(lt9611->reset_gpio, 1);
247
-	msleep(100);
248
+	msleep(20);
249
 }
250
 
251
 static void lt9611_assert_5v(struct lt9611 *lt9611)
252
@@ -562,31 +581,14 @@
253
 	return 0;
254
 }
255
 
256
-static struct lt9611_mode *lt9611_find_mode(const struct drm_display_mode *mode)
257
-{
258
-	int i;
259
-
260
-	for (i = 0; i < ARRAY_SIZE(lt9611_modes); i++) {
261
-		if (lt9611_modes[i].hdisplay == mode->hdisplay &&
262
-		    lt9611_modes[i].vdisplay == mode->vdisplay &&
263
-		    lt9611_modes[i].vrefresh == drm_mode_vrefresh(mode)) {
264
-			return &lt9611_modes[i];
265
-		}
266
-	}
267
-
268
-	return NULL;
269
-}
270
-
271
-/* connector funcs */
272
-static enum drm_connector_status
273
-lt9611_connector_detect(struct drm_connector *connector, bool force)
274
+static enum drm_connector_status lt9611_bridge_detect(struct drm_bridge *bridge)
275
 {
276
-	struct lt9611 *lt9611 = connector_to_lt9611(connector);
277
+	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
278
 	unsigned int reg_val = 0;
279
 	int connected = 0;
280
 
281
 	regmap_read(lt9611->regmap, 0x825e, &reg_val);
282
-	connected  = (reg_val & BIT(2));
283
+	connected  = (reg_val & (BIT(2) | BIT(0)));
284
 
285
 	lt9611->status = connected ?  connector_status_connected :
286
 				connector_status_disconnected;
287
@@ -675,34 +677,37 @@
288
 	return 0;
289
 }
290
 
291
-static int lt9611_connector_get_modes(struct drm_connector *connector)
292
+/* bridge funcs */
293
+static void
294
+lt9611_bridge_atomic_enable(struct drm_bridge *bridge,
295
+			    struct drm_bridge_state *old_bridge_state)
296
 {
297
-	struct lt9611 *lt9611 = connector_to_lt9611(connector);
298
-	unsigned int count;
299
-	struct edid *edid;
300
+	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
301
+	struct drm_atomic_state *state = old_bridge_state->base.state;
302
+	struct drm_connector *connector;
303
+	struct drm_connector_state *conn_state;
304
+	struct drm_crtc_state *crtc_state;
305
+	struct drm_display_mode *mode;
306
+	unsigned int postdiv;
307
 
308
-	lt9611_power_on(lt9611);
309
-	edid = drm_do_get_edid(connector, lt9611_get_edid_block, lt9611);
310
-	drm_connector_update_edid_property(connector, edid);
311
-	count = drm_add_edid_modes(connector, edid);
312
-	kfree(edid);
313
+	connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
314
+	if (WARN_ON(!connector))
315
+		return;
316
 
317
-	return count;
318
-}
319
+	conn_state = drm_atomic_get_new_connector_state(state, connector);
320
+	if (WARN_ON(!conn_state))
321
+		return;
322
 
323
-static enum drm_mode_status
324
-lt9611_connector_mode_valid(struct drm_connector *connector,
325
-			    struct drm_display_mode *mode)
326
-{
327
-	struct lt9611_mode *lt9611_mode = lt9611_find_mode(mode);
328
+	crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
329
+	if (WARN_ON(!crtc_state))
330
+		return;
331
 
332
-	return lt9611_mode ? MODE_OK : MODE_BAD;
333
-}
334
+	mode = &crtc_state->adjusted_mode;
335
 
336
-/* bridge funcs */
337
-static void lt9611_bridge_enable(struct drm_bridge *bridge)
338
-{
339
-	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
340
+	lt9611_mipi_input_digital(lt9611, mode);
341
+	lt9611_pll_setup(lt9611, mode, &postdiv);
342
+	lt9611_mipi_video_setup(lt9611, mode);
343
+	lt9611_pcr_setup(lt9611, mode, postdiv);
344
 
345
 	if (lt9611_power_on(lt9611)) {
346
 		dev_err(lt9611->dev, "power on failed\n");
347
@@ -710,10 +715,11 @@
348
 	}
349
 
350
 	lt9611_mipi_input_analog(lt9611);
351
+	lt9611_hdmi_set_infoframes(lt9611, connector, mode);
352
 	lt9611_hdmi_tx_digital(lt9611);
353
 	lt9611_hdmi_tx_phy(lt9611);
354
 
355
-	msleep(500);
356
+	//msleep(500);
357
 
358
 	lt9611_video_check(lt9611);
359
 
360
@@ -721,7 +727,9 @@
361
 	regmap_write(lt9611->regmap, 0x8130, 0xea);
362
 }
363
 
364
-static void lt9611_bridge_disable(struct drm_bridge *bridge)
365
+static void
366
+lt9611_bridge_atomic_disable(struct drm_bridge *bridge,
367
+			     struct drm_bridge_state *old_bridge_state)
368
 {
369
 	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
370
 	int ret;
371
@@ -739,25 +747,10 @@
372
 	}
373
 }
374
 
375
-static struct
376
-drm_connector_helper_funcs lt9611_bridge_connector_helper_funcs = {
377
-	.get_modes = lt9611_connector_get_modes,
378
-	.mode_valid = lt9611_connector_mode_valid,
379
-};
380
-
381
-static const struct drm_connector_funcs lt9611_bridge_connector_funcs = {
382
-	.fill_modes = drm_helper_probe_single_connector_modes,
383
-	.detect = lt9611_connector_detect,
384
-	.destroy = drm_connector_cleanup,
385
-	.reset = drm_atomic_helper_connector_reset,
386
-	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
387
-	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
388
-};
389
-
390
 static struct mipi_dsi_device *lt9611_attach_dsi(struct lt9611 *lt9611,
391
 						 struct device_node *dsi_node)
392
 {
393
-	const struct mipi_dsi_device_info info = { "lt9611", 0, NULL };
394
+	const struct mipi_dsi_device_info info = { "lt9611", 0, lt9611->dev->of_node};
395
 	struct mipi_dsi_device *dsi;
396
 	struct mipi_dsi_host *host;
397
 	int ret;
398
@@ -802,42 +795,12 @@
399
 	mipi_dsi_device_unregister(lt9611->dsi0);
400
 }
401
 
402
-static int lt9611_connector_init(struct drm_bridge *bridge, struct lt9611 *lt9611)
403
-{
404
-	int ret;
405
-
406
-	ret = drm_connector_init(bridge->dev, &lt9611->connector,
407
-				 &lt9611_bridge_connector_funcs,
408
-				 DRM_MODE_CONNECTOR_HDMIA);
409
-	if (ret) {
410
-		DRM_ERROR("Failed to initialize connector with drm\n");
411
-		return ret;
412
-	}
413
-
414
-	drm_connector_helper_add(&lt9611->connector,
415
-				 &lt9611_bridge_connector_helper_funcs);
416
-	drm_connector_attach_encoder(&lt9611->connector, bridge->encoder);
417
-
418
-	if (!bridge->encoder) {
419
-		DRM_ERROR("Parent encoder object not found");
420
-		return -ENODEV;
421
-	}
422
-
423
-	return 0;
424
-}
425
-
426
 static int lt9611_bridge_attach(struct drm_bridge *bridge,
427
 				enum drm_bridge_attach_flags flags)
428
 {
429
 	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
430
 	int ret;
431
 
432
-	if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {
433
-		ret = lt9611_connector_init(bridge, lt9611);
434
-		if (ret < 0)
435
-			return ret;
436
-	}
437
-
438
 	/* Attach primary DSI */
439
 	lt9611->dsi0 = lt9611_attach_dsi(lt9611, lt9611->dsi0_node);
440
 	if (IS_ERR(lt9611->dsi0))
441
@@ -852,11 +815,11 @@
442
 		}
443
 	}
444
 
445
-	return 0;
446
+	return drm_bridge_attach(bridge->encoder, lt9611->next_bridge,
447
+				 bridge, flags);
448
 
449
 err_unregister_dsi0:
450
 	lt9611_bridge_detach(bridge);
451
-	drm_connector_cleanup(&lt9611->connector);
452
 	mipi_dsi_device_unregister(lt9611->dsi0);
453
 
454
 	return ret;
455
@@ -866,74 +829,54 @@
456
 						     const struct drm_display_info *info,
457
 						     const struct drm_display_mode *mode)
458
 {
459
-	struct lt9611_mode *lt9611_mode = lt9611_find_mode(mode);
460
 	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
461
 
462
-	if (!lt9611_mode)
463
-		return MODE_BAD;
464
-	else if (lt9611_mode->intfs > 1 && !lt9611->dsi1)
465
+	if (mode->hdisplay > 3840)
466
+		return MODE_BAD_HVALUE;
467
+
468
+	if (mode->vdisplay > 2160)
469
+		return MODE_BAD_VVALUE;
470
+
471
+	if (mode->hdisplay == 3840 &&
472
+	    mode->vdisplay == 2160 &&
473
+	    drm_mode_vrefresh(mode) > 30)
474
+		return MODE_CLOCK_HIGH;
475
+
476
+	if (mode->hdisplay > 2000 && !lt9611->dsi1_node)
477
 		return MODE_PANEL;
478
 	else
479
 		return MODE_OK;
480
 }
481
 
482
-static void lt9611_bridge_pre_enable(struct drm_bridge *bridge)
483
+static void lt9611_bridge_atomic_pre_enable(struct drm_bridge *bridge,
484
+					    struct drm_bridge_state *old_bridge_state)
485
 {
486
 	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
487
+	static const struct reg_sequence reg_cfg[] = {
488
+		{ 0x8102, 0x12 },
489
+		{ 0x8123, 0x40 },
490
+		{ 0x8130, 0xea },
491
+		{ 0x8011, 0xfa },
492
+	};
493
 
494
 	if (!lt9611->sleep)
495
 		return;
496
 
497
-	lt9611_reset(lt9611);
498
-	regmap_write(lt9611->regmap, 0x80ee, 0x01);
499
+	regmap_multi_reg_write(lt9611->regmap,
500
+			       reg_cfg, ARRAY_SIZE(reg_cfg));
501
 
502
 	lt9611->sleep = false;
503
 }
504
 
505
-static void lt9611_bridge_post_disable(struct drm_bridge *bridge)
506
+static void
507
+lt9611_bridge_atomic_post_disable(struct drm_bridge *bridge,
508
+				  struct drm_bridge_state *old_bridge_state)
509
 {
510
 	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
511
 
512
 	lt9611_sleep_setup(lt9611);
513
 }
514
 
515
-static void lt9611_bridge_mode_set(struct drm_bridge *bridge,
516
-				   const struct drm_display_mode *mode,
517
-				   const struct drm_display_mode *adj_mode)
518
-{
519
-	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
520
-	struct hdmi_avi_infoframe avi_frame;
521
-	int ret;
522
-
523
-	lt9611_bridge_pre_enable(bridge);
524
-
525
-	lt9611_mipi_input_digital(lt9611, mode);
526
-	lt9611_pll_setup(lt9611, mode);
527
-	lt9611_mipi_video_setup(lt9611, mode);
528
-	lt9611_pcr_setup(lt9611, mode);
529
-
530
-	ret = drm_hdmi_avi_infoframe_from_display_mode(&avi_frame,
531
-						       &lt9611->connector,
532
-						       mode);
533
-	if (!ret)
534
-		lt9611->vic = avi_frame.video_code;
535
-}
536
-
537
-static enum drm_connector_status lt9611_bridge_detect(struct drm_bridge *bridge)
538
-{
539
-	struct lt9611 *lt9611 = bridge_to_lt9611(bridge);
540
-	unsigned int reg_val = 0;
541
-	int connected;
542
-
543
-	regmap_read(lt9611->regmap, 0x825e, &reg_val);
544
-	connected  = reg_val & BIT(2);
545
-
546
-	lt9611->status = connected ?  connector_status_connected :
547
-				connector_status_disconnected;
548
-
549
-	return lt9611->status;
550
-}
551
-
552
 static struct edid *lt9611_bridge_get_edid(struct drm_bridge *bridge,
553
 					   struct drm_connector *connector)
554
 {
555
@@ -954,13 +897,17 @@
556
 	.attach = lt9611_bridge_attach,
557
 	.detach = lt9611_bridge_detach,
558
 	.mode_valid = lt9611_bridge_mode_valid,
559
-	.enable = lt9611_bridge_enable,
560
-	.disable = lt9611_bridge_disable,
561
-	.post_disable = lt9611_bridge_post_disable,
562
-	.mode_set = lt9611_bridge_mode_set,
563
 	.detect = lt9611_bridge_detect,
564
 	.get_edid = lt9611_bridge_get_edid,
565
 	.hpd_enable = lt9611_bridge_hpd_enable,
566
+
567
+	.atomic_pre_enable = lt9611_bridge_atomic_pre_enable,
568
+	.atomic_enable = lt9611_bridge_atomic_enable,
569
+	.atomic_disable = lt9611_bridge_atomic_disable,
570
+	.atomic_post_disable = lt9611_bridge_atomic_post_disable,
571
+	.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
572
+	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
573
+	.atomic_reset = drm_atomic_helper_bridge_reset,
574
 };
575
 
576
 static int lt9611_parse_dt(struct device *dev,
577
@@ -976,7 +923,7 @@
578
 
579
 	lt9611->ac_mode = of_property_read_bool(dev->of_node, "lt,ac-mode");
580
 
581
-	return 0;
582
+	return drm_of_find_panel_or_bridge(dev->of_node, 2, -1, NULL, &lt9611->next_bridge);
583
 }
584
 
585
 static int lt9611_gpio_init(struct lt9611 *lt9611)
586
diff -Naur a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
587
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c	2023-10-17 10:56:34.000000000 +0800
588
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c	2023-10-18 10:53:22.268074700 +0800
589
@@ -793,58 +793,6 @@
590
 	mtk_dsi_poweroff(dsi);
591
 }
592
 
593
-static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi)
594
-{
595
-	int ret;
596
-	int indicated_disp_path = -1;
597
-
598
-	ret = drm_simple_encoder_init(drm, &dsi->encoder,
599
-				      DRM_MODE_ENCODER_DSI);
600
-	if (ret) {
601
-		DRM_ERROR("Failed to encoder init to drm\n");
602
-		return ret;
603
-	}
604
-
605
-	if (of_find_property(dsi->host.dev->of_node, "mediatek,indicated-display-path", &ret)) {
606
-		ret = of_property_read_u32(dsi->host.dev->of_node,
607
-					   "mediatek,indicated-display-path",
608
-					   &indicated_disp_path);
609
-		if (ret) {
610
-			dev_err(dsi->host.dev, "Failed to get indicated-display-path id\n");
611
-			return ret;
612
-		}
613
-		if (indicated_disp_path < 0 || indicated_disp_path >= MAX_CRTC) {
614
-			dev_err(dsi->host.dev, "Wrong indicated-display-path id read from dts !\n");
615
-			indicated_disp_path = -1;
616
-		}
617
-	}
618
-
619
-	if (indicated_disp_path == -1)
620
-		dsi->encoder.possible_crtcs =
621
-			mtk_drm_find_possible_crtc_by_comp(drm, dsi->host.dev);
622
-	else
623
-		dsi->encoder.possible_crtcs = (1 << indicated_disp_path);
624
-
625
-	ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL,
626
-				DRM_BRIDGE_ATTACH_NO_CONNECTOR);
627
-	if (ret)
628
-		goto err_cleanup_encoder;
629
-
630
-	dsi->connector = drm_bridge_connector_init(drm, &dsi->encoder);
631
-	if (IS_ERR(dsi->connector)) {
632
-		DRM_ERROR("Unable to create bridge connector\n");
633
-		ret = PTR_ERR(dsi->connector);
634
-		goto err_cleanup_encoder;
635
-	}
636
-	drm_connector_attach_encoder(dsi->connector, &dsi->encoder);
637
-
638
-	return 0;
639
-
640
-err_cleanup_encoder:
641
-	drm_encoder_cleanup(&dsi->encoder);
642
-	return ret;
643
-}
644
-
645
 int mtk_dsi_encoder_index(struct device *dev)
646
 {
647
 	struct mtk_dsi *dsi = dev_get_drvdata(dev);
648
@@ -854,72 +802,18 @@
649
 	return encoder_index;
650
 }
651
 
652
-static int mtk_dsi_bind(struct device *dev, struct device *master, void *data)
653
-{
654
-	int ret;
655
-	struct drm_device *drm = data;
656
-	struct mtk_dsi *dsi = dev_get_drvdata(dev);
657
-	if (!dsi->next_bridge)
658
-		return 0;
659
-
660
-	ret = mtk_dsi_encoder_init(drm, dsi);
661
-	if (ret)
662
-		return ret;
663
-
664
-	return device_reset_optional(dev);
665
-}
666
-
667
-static void mtk_dsi_unbind(struct device *dev, struct device *master,
668
-			   void *data)
669
-{
670
-	struct mtk_dsi *dsi = dev_get_drvdata(dev);
671
-	if (!dsi->next_bridge)
672
-		return;
673
-
674
-	drm_encoder_cleanup(&dsi->encoder);
675
-}
676
-
677
-static const struct component_ops mtk_dsi_component_ops = {
678
-	.bind = mtk_dsi_bind,
679
-	.unbind = mtk_dsi_unbind,
680
-};
681
-
682
 static int mtk_dsi_host_attach(struct mipi_dsi_host *host,
683
 			       struct mipi_dsi_device *device)
684
 {
685
 	struct mtk_dsi *dsi = host_to_dsi(host);
686
-	struct device *dev = host->dev;
687
-	int ret;
688
 
689
 	dsi->lanes = device->lanes;
690
 	dsi->format = device->format;
691
 	dsi->mode_flags = device->mode_flags;
692
-	dsi->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
693
-	if (IS_ERR(dsi->next_bridge))
694
-		return PTR_ERR(dsi->next_bridge);
695
-
696
-	drm_bridge_add(&dsi->bridge);
697
-
698
-	ret = component_add(host->dev, &mtk_dsi_component_ops);
699
-	if (ret) {
700
-		DRM_ERROR("failed to add dsi_host component: %d\n", ret);
701
-		drm_bridge_remove(&dsi->bridge);
702
-		return ret;
703
-	}
704
 
705
 	return 0;
706
 }
707
 
708
-static int mtk_dsi_host_detach(struct mipi_dsi_host *host,
709
-			       struct mipi_dsi_device *device)
710
-{
711
-	struct mtk_dsi *dsi = host_to_dsi(host);
712
-
713
-	component_del(host->dev, &mtk_dsi_component_ops);
714
-	drm_bridge_remove(&dsi->bridge);
715
-	return 0;
716
-}
717
-
718
 static void mtk_dsi_wait_for_idle(struct mtk_dsi *dsi)
719
 {
720
 	int ret;
721
@@ -1075,14 +969,73 @@
722
 
723
 static const struct mipi_dsi_host_ops mtk_dsi_ops = {
724
 	.attach = mtk_dsi_host_attach,
725
-	.detach = mtk_dsi_host_detach,
726
 	.transfer = mtk_dsi_host_transfer,
727
 };
728
 
729
+static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi)
730
+{
731
+	int ret;
732
+
733
+	ret = drm_simple_encoder_init(drm, &dsi->encoder,
734
+				      DRM_MODE_ENCODER_DSI);
735
+	if (ret) {
736
+		DRM_ERROR("Failed to encoder init to drm\n");
737
+		return ret;
738
+	}
739
+
740
+	dsi->encoder.possible_crtcs = mtk_drm_find_possible_crtc_by_comp(drm, dsi->host.dev);
741
+
742
+	ret = drm_bridge_attach(&dsi->encoder, &dsi->bridge, NULL,
743
+				DRM_BRIDGE_ATTACH_NO_CONNECTOR);
744
+	if (ret)
745
+		goto err_cleanup_encoder;
746
+
747
+	dsi->connector = drm_bridge_connector_init(drm, &dsi->encoder);
748
+	if (IS_ERR(dsi->connector)) {
749
+		DRM_ERROR("Unable to create bridge connector\n");
750
+		ret = PTR_ERR(dsi->connector);
751
+		goto err_cleanup_encoder;
752
+	}
753
+	drm_connector_attach_encoder(dsi->connector, &dsi->encoder);
754
+
755
+	return 0;
756
+
757
+err_cleanup_encoder:
758
+	drm_encoder_cleanup(&dsi->encoder);
759
+	return ret;
760
+}
761
+
762
+static int mtk_dsi_bind(struct device *dev, struct device *master, void *data)
763
+{
764
+	int ret;
765
+	struct drm_device *drm = data;
766
+	struct mtk_dsi *dsi = dev_get_drvdata(dev);
767
+
768
+	ret = mtk_dsi_encoder_init(drm, dsi);
769
+	if (ret)
770
+		return ret;
771
+
772
+	return device_reset_optional(dev);
773
+}
774
+
775
+static void mtk_dsi_unbind(struct device *dev, struct device *master,
776
+			   void *data)
777
+{
778
+	struct mtk_dsi *dsi = dev_get_drvdata(dev);
779
+
780
+	drm_encoder_cleanup(&dsi->encoder);
781
+}
782
+
783
+static const struct component_ops mtk_dsi_component_ops = {
784
+	.bind = mtk_dsi_bind,
785
+	.unbind = mtk_dsi_unbind,
786
+};
787
+
788
 static int mtk_dsi_probe(struct platform_device *pdev)
789
 {
790
 	struct mtk_dsi *dsi;
791
 	struct device *dev = &pdev->dev;
792
+	struct drm_panel *panel;
793
 	struct resource *regs;
794
 	int irq_num;
795
 	int ret;
796
@@ -1099,6 +1052,12 @@
797
 		return ret;
798
 	}
799
 
800
+	dsi->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
801
+	if (IS_ERR(dsi->next_bridge)) {
802
+		ret = PTR_ERR(dsi->next_bridge);
803
+		goto err_unregister_host;
804
+	}
805
+
806
 	dsi->driver_data = of_device_get_match_data(dev);
807
 
808
 	dsi->poweron_in_hs_mode = 1;
809
@@ -1167,24 +1126,12 @@
810
 	dsi->bridge.of_node = dev->of_node;
811
 	dsi->bridge.type = DRM_MODE_CONNECTOR_DSI;
812
 
813
+	drm_bridge_add(&dsi->bridge);
814
 
815
-	dsi->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
816
-	if (IS_ERR(dsi->next_bridge) && PTR_ERR(dsi->next_bridge) == -ENODEV) {
817
-		/* if no panel has been connected in the device tree on purpose,
818
-		 * add the component directly here with empty ops as the
819
-		 * unction doing this will never be called. But first warn
820
-		 * about this.
821
-		 */
822
-		dev_warn(dev, "No panel connected in the devicetree, continuing without any panel...\n");
823
-		dsi->next_bridge = NULL;
824
-		drm_bridge_add(&dsi->bridge);
825
-
826
-		ret = component_add(&pdev->dev, &mtk_dsi_component_ops);
827
-		if (ret) {
828
-			DRM_ERROR("failed to add dsi_host component: %d\n", ret);
829
-			drm_bridge_remove(&dsi->bridge);
830
-			return ret;
831
-		}
832
+	ret = component_add(&pdev->dev, &mtk_dsi_component_ops);
833
+	if (ret) {
834
+		dev_err(&pdev->dev, "failed to add component: %d\n", ret);
835
+		goto err_unregister_host;
836
 	}
837
 
838
 	return 0;
839
@@ -1199,6 +1146,8 @@
840
 	struct mtk_dsi *dsi = platform_get_drvdata(pdev);
841
 
842
 	mtk_output_dsi_disable(dsi);
843
+	drm_bridge_remove(&dsi->bridge);
844
+	component_del(&pdev->dev, &mtk_dsi_component_ops);
845
 	mipi_dsi_host_unregister(&dsi->host);
846
 
847
 	return 0;
848
diff -Naur a/drivers/gpu/drm/panel/panel-rpi-pumpkin-touchscreen.c b/drivers/gpu/drm/panel/panel-rpi-pumpkin-touchscreen.c
849
--- a/drivers/gpu/drm/panel/panel-rpi-pumpkin-touchscreen.c	2023-10-17 10:56:35.000000000 +0800
850
+++ b/drivers/gpu/drm/panel/panel-rpi-pumpkin-touchscreen.c	2023-10-18 15:12:15.691960000 +0800
851
@@ -527,8 +527,8 @@
852
 
853
 static int __init rpi_touchscreen_init(void)
854
 {
855
-	mipi_dsi_driver_register(&rpi_touchscreen_dsi_driver);
856
-	return i2c_add_driver(&rpi_touchscreen_driver);
... This diff was truncated because it exceeds the maximum size that can be displayed.
(3-3/7)